1. Field of the Invention
The present invention relates to a homo-code (identical or same code) continuity proof testing device, and in particular to a homo-code continuity proof testing device which conducts tests with test data including a predetermined homo-code continuity proof test pattern.
In recent years, a digital network has become rapidly widespread with the advance of an LSI technique, an optical fiber cable technique, a digital signal processing technique, and the like. For transferring a signal from a transmitting device to a receiving device in an asynchronous state in the digital network, there is a method wherein the receiving device extracts a clock included in a received signal to perform the receiving operation for the signal in synchronization with the extracted clock.
When the received signal includes a continuous or sequential homo-code in this method, it is difficult for the receiving device to extract the clock. As a measure for this difficulty, the transmitting device scrambles and transmits the signal so as not to include the continuous homo-code, while the receiving device extracts the clock from the received signal and then descrambles the received signal to restore the signal before the scrambling.
However, there is a possibility that the continuous homo-code is included even in the scrambled signal. Therefore, it is important how many bits continued with a homo-code at maximum would enable the receiving device to accurately extract the clock from the signal, that is whether or not the receiving device has a homo-code continuity proof strength.
2. Description of the Related Art
FIG. 16 shows an arrangement of a prior art homo-code continuity proof testing device 10. A device 40 to be tested is connected to the testing device 10 with a transmission line 30 which transmits a signal 100. In this arrangement, the transmission line 30 is an optical fiber, and the signal 100 is included in a frame, a packet, a cell, or the like and transmitted through the transmission line 30.
The testing device 10 is composed of a homo-code continuity pattern inserter 19 which inserts data 105 for generating a homo-code continuity proof test pattern on the transmission line 30, a frame head timing generator 29! which generates a frame head timing signal 107 indicating a frame head, a scrambler 16 which scrambles the data 105 from the inserter 19 to generate frame data 106 including a frame head pattern and the homo-code continuity proof test pattern by the timing signal 107, and an E/O converter 17 which synchronizes (multiplexes) the data 106 with a clock 101 and converts the electrical signal into the optical signal 100 to be transmitted to the transmission line 30.
The tested device 40 is composed of an O/E converter 41 for outputting data 201 which is the optical signal 100 from the transmission line 30 converted into the electrical signal and for extracting a clock 200 from the signal 100, a clock disconnection detector 50 for detecting whether or not the extracted clock 200 is disconnected to output a determination result signal 216, a frame head detector 51 for detecting the head of the frame data 201 to output a frame head timing signal 219, and a descrambler 42 for descrambling the data 201 to be restored, by the timing of the timing signal 219 being made a starting phase.
As mentioned above, when the homo-code either xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d continues in the data 100 on the transmission line 30, the clock components in the data 100 disappear, so that the clock 200 can not be extracted from the tested device 40. Therefore, the homo-code continuity proof test is performed in order to determine the limit of the homo-code continuity proof strength of the tested device 40 on the receiving side.
Namely, it is tested how many bits continued with the homo-code on the transmission line 30 would disable a clock extractor (not shown) of the O/E converter 41 to extract the clock, and disable the data to be normally received. The maximum bit number at which the clock can be extracted is supposed to be the homo-code continuity proof strength of the tested device 40.
The operations of the prior art homo-code continuity proof testing device 10 and the tested device 40 will now be described.
The testing device 10 predicts a scramble pattern at the homo-code continuity pattern inserter 19 in order to generate the homo-code continuity proof test pattern on the transmission line 30, and inserts thereinto such a pattern as the output of the scrambler 16 becomes all xe2x80x9c0xe2x80x9d or all xe2x80x9c1xe2x80x9d of a predetermined bit number.
Namely, the scrambler 16 is composed of a shift register and an EXOR circuit (not shown), and a self-reset type of scrambler for resetting a frame to all xe2x80x9c1xe2x80x9d at the frame head and performing the scrambling per each frame. Accordingly, the scramble pattern of the scrambler 16 can be predicted based on the same generation polynomial, the same starting phase, and the same initial value as the scrambler 16.
In order to transmit the homo-code of all xe2x80x9c0xe2x80x9d to the transmission line 30, the inserter 19 has only to generate the same pattern as the one at the scrambling time, and has only to provide the scrambler 16 with the pattern data 105 generated by the same generation polynomial, starting phase, and initial value as the scrambler 16.
Similarly, in order to transmit the homo-code of all xe2x80x9c1xe2x80x9d to the transmission line 30, the inserter 19 has only to provide the scrambler 16 with the inverted pattern data 105 of the scramble pattern.
It is to be noted that a frame head detecting pattern is mapped at the head of the frame, so that the scrambler 16 detects the head position by the timing signal 107 and scrambles all of the bits except the frame head detecting pattern.
The reason why the frame head detecting pattern is excluded from the scramble object is that the tested device 40 establishes a frame synchronization by this pattern.
The E/O converter 17 synchronizes (multiplexes) the data 106 with the clock 101, and converts the data 106 from the electrical signal into the optical signal 100 to be outputted to the transmission line 30.
In the tested device 40, the O/E converter 41 converts the received optical signal 100 into the electrical signal to extract the data 201 and the clock 200. The clock disconnection detector 50 determines the result of the homo-code continuity proof test by monitoring the clock disconnection. That the clock has been normally extracted means that the device has a strength for the homo-code continuity proof test pattern, while that the clock disconnection has been detected means that the device does not have a strength for the homo-code continuity proof test pattern.
In addition, the frame head detector 51 detects the frame head by the frame head detecting pattern, and the descrambler 42 restores the receiving data by starting the descrambling from the bit next to the frame head detecting pattern.
Thus, the prior art homo-code continuity proof testing device has determined the homo-code continuity proof strength by detecting the clock disconnection.
In such a determination method by the prior art homo-code continuity proof test, the determination reference is vague to what degree of disturbance of the extracted clock 200 the clock disconnection detector 50 can determine the clock disconnection, so that the disturbance of the extracted clock 200 influences the determination result. Therefore, there is a problem that the homo-code continuity proof strength can not be determined with a high accuracy.
On the other hand, the homo-code continuity proof testing device of the ATM-PON (Asynchronous Transfer Mode Passive Optical Network) system conformed to the ITU-T recommendation G.983 has also a problem, which will now be described.
The technique of the ATM-PON system is indispensable for the construction of such an optical access network as represented by the FTTH (Fiber to the Home) in order to achieve an advanced information communication service.
The above-noted recommendation prescribes the communication protocol between an Optical Network Unit (hereinafter abbreviated as ONU) providing a general subscriber with an interface and an Optical Line Termination (hereinafter abbreviated as OLT) on the station side.
FIGS. 17A and 17B respectively show a format of a down PLOAM cell 70 and an ATM data cell 60 in the ATM-PON.
The PLOAM cell 70 is composed of a PLOAM HEADER field 71 of octet Nos. xe2x80x9c1xe2x80x9d-xe2x80x9c4xe2x80x9d and an HEC field 72 of an octet No.xe2x80x9c5xe2x80x9d for detecting the synchronization of the PLOAM cell, an IDENT field 73 of an octet No.xe2x80x9c6xe2x80x9d for detecting the frame synchronization, an SYNC field 74 of octet Nos.xe2x80x9c7xe2x80x9d and xe2x80x9c8xe2x80x9d for offering 1 KHz reference, GRANT fields 75_1-75_4 of octet Nos.xe2x80x9c9xe2x80x9d-xe2x80x9c15xe2x80x9d, xe2x80x9c17xe2x80x9d-xe2x80x9c23xe2x80x9d, xe2x80x9c25xe2x80x9d-xe2x80x9c31xe2x80x9d, and xe2x80x9c33xe2x80x9d-xe2x80x9c38xe2x80x9d for prescribing the up bandwidth of the ONU, CRC fields 76_1-76_4 of octet Nos.xe2x80x9c16xe2x80x9d, xe2x80x9c24xe2x80x9d, xe2x80x9c32xe2x80x9d, and xe2x80x9c39xe2x80x9d for protecting grant information, a message PON-ID field 77 of an octet No.xe2x80x9c40xe2x80x9d, a message ID field 78 of an octet No.xe2x80x9c41xe2x80x9d, a message field 79 of octet Nos.xe2x80x9c42xe2x80x9d-xe2x80x9c51xe2x80x9d, a CRC field 80 of an octet No.xe2x80x9c52xe2x80x9d for protecting a message, and a BIP field 81 of an octet No.xe2x80x9c53xe2x80x9d.
The ATM data cell 60 is composed of a header field 61 of the octet Nos.xe2x80x9c1xe2x80x9d-xe2x80x9c5xe2x80x9d, and a payload field 62 of the octet Nos.xe2x80x9c5xe2x80x9d-xe2x80x9c53xe2x80x9d. The header field 61 is composed of a field 61_1 for VPI, VCI, PTI, and CLP, and an HEC field 61_2.
Hereinafter, reference numerals of the data and the signals set in the fields of the PLOAM cell 70 and the ATM data cell 60 are occasionally used for those of the fields, for the convenience""s sake.
FIGS. 18A and 18B respectively show an arrangement of down T frames of 155 Mbps and 600 Mbps. The 155 Mbps down frame shown in FIG. 18A is composed of 56 cells, i.e. a PLOAM cell 70_1, ATM data cells 60_1-60_27, a PLOAM cell 70_2, and ATM data cells 60_28-60_54.
The 600 Mbps down frame shown in FIG. 18B is composed of 224 cells, i.e. the PLOAM cell 70_1, the ATM data cells 60_1-60_27, the PLOAM cell 70_2, and the ATM data cells 60_28-60_54, as well as a PLOAM cell 70_8 and ATM data cells 60_190-60_216.
While the generation of the ATM-PON homo-code continuity proof test pattern is prescribed by the ITU-T recommendation G.983, its generation means and detection method are not prescribed.
The homo-code continuity proof test pattern of the ATM-PON prescribed by the recommendation is composed of the following four types of blocks whose data are continuous.
{circle around (1)} All xe2x80x9c1xe2x80x9d
{circle around (2)} PN (pseudo random) pattern whose mark rate is xc2xd (hereinafter, occasionally referred to as PN signal)
{circle around (3)} All xe2x80x9c0xe2x80x9d
{circle around (4)} Data block composed of ATM header
The arrangement of the test pattern is prescribed as the repetition of the ATM cell formed by the above types {circle around (4)}, {circle around (1)}, and {circle around (2)} and the ATM cell formed by the above types {circle around (4)}, {circle around (3)}, and {circle around (2)}.
This test pattern is more complicated compared with the prior art homo-code continuity proof test pattern of all xe2x80x9c0xe2x80x9d or all xe2x80x9c1xe2x80x9d.
Moreover, as for the down T frame in that recommendation, a distributed (not resetting periodically) type of scrambling whose starting phase is free and which performs the scrambling sequentially is prescribed, and requires the scrambling for all of the bits of the down frame.
Namely, different from the prior art reset type of scrambling method in which the scrambling starting phase and the then initial value are predetermined periodically, the value of the shift register is not specified in the scrambler circuit at the phase where the homo-code continuity proof test pattern is desired to be generated, and the execution of the homo-code continuity proof test by the scrambling requires a complicated circuit.
It is accordingly an object of the present invention to provide a homo-code continuity proof testing device for performing tests by using test data including a predetermined homo-code continuity proof test pattern wherein the device performs a homo-code continuity proof test with a definite determination reference and a high determination accuracy without a complicated circuit.
In order to achieve the above-mentioned object, a homo-code continuity proof testing device of the present invention according to claim 1 comprises a synchronous pattern inserter which inserts a data synchronous pattern into test data, a test pattern inserter which inserts a predetermined test pattern, for testing a homo-code continuity proof strength, into the test data, a synchronizing portion which synchronizes the test data, with a predetermined clock, to be transmitted, and an error detecting pattern adder which adds an error detecting pattern for detecting an error to the test data.
Namely, as shown in FIG. 1, a data synchronous pattern inserter 19 in a homo-code continuity proof testing device (OLT) 10 on a transmitting side inserts a data synchronous pattern into test data (ATM data cell) 60, enabling a homo-code continuity proof testing device (ONU) 40 on a receiving side to establish the synchronization of the test data.
A test pattern inserter (homo-code continuity pattern inserter) 18 inserts a predetermined test pattern into test data (cell 103), so that an E/O converter 17 which comprises a synchronizing portion synchronizes test data (cell 106), with a predetermined clock 101, to be transmitted as e.g. a down cell 100 to a transmission line 30.
Also, the error detecting pattern adder of the testing device 10 on the transmitting side adds an error detecting pattern for detecting the test data error. The error detecting pattern enables the testing device 40 on the receiving side to make a determination for the homo-code continuity proof test.
In order to achieve the above-mentioned object, a homo-code continuity proof testing device of the present invention according to claim 2 comprises a clock extractor which receives test data including a predetermined test pattern for testing a data synchronous pattern and a homo-code continuity proof strength to extract a clock included in the test data, a data synchronization detector which detects the data synchronous pattern in synchronization with the clock, and a homo-code continuity proof test determining portion which determines a homo-code continuity proof test based on a detection result of the data synchronous pattern.
Namely, in FIG. 1, the clock extractor included in the O/E converter 41 of the homo-code continuity proof testing device (ONU) 40 extracts a clock 200 included in the test data. A data synchronization detector 43 detects the data synchronous pattern included in e.g. a cell 201 (test data) in synchronization with the clock 200. When not detecting the synchronous pattern from the cell 201, the homo-code continuity proof test determining portion 48 included in e.g. the synchronization detector 43 outputs a synchronization determination result signal 218 indicating said fact. Otherwise the homo-code continuity proof test determining portion 48 outputs the synchronization determination result signal 218 indicating the opposite fact.
Based on this determination result signal 218, it is determined whether or not the. ONU 40 has a homo-code continuity proof strength for the test pattern.
Namely, upon occurrence of a clock disconnection or a clock disturbance, the clock 200 can not be normally extracted from the down cell 100, resulting in the miss of synchronization. Accordingly, the synchronization determination result of the ONU 40 can be regarded as that of the homo-code continuity proof test without changes as follows:
Established synchronization of ONU 40xe2x86x92normal homo-code continuity proof test determination (having a proof strength)
Missed synchronization of ONU 40xe2x86x92abnormal homo-code continuity proof test determination (having no proof strength)
Thus, the homo-code continuity proof test can be performed with a definite and highly accurate determination reference of xe2x80x9cpresence/absence of established synchronizationxe2x80x9d without a complicated circuit, not by directly monitoring the clock disconnection and the clock disturbance but by monitoring the miss of synchronization in the down cell.
Also, in the present invention of claim 3 according to the present invention of claim 2, the test data may include an error detecting pattern for detecting an error, the device may further comprise an error calculator which calculates a presence/absence of an error of the test data in synchronization with the clock, the test determining portion may determine the homo-code continuity proof test based on a calculating result of the error calculator.
Namely, the error detecting pattern is included in the test data 201. An error calculator 45 calculates the presence/absence of the test data error based on the error detecting pattern in synchronization with the extracted clock 200. In the absence of an error, the test determining portion 48 determines that there is a homo-code continuity proof strength, but otherwise it determines that there is not a homo-code continuity proof strength.
Namely, when the clock 200 can not be extracted, the synchronization for detecting the test data can not be guaranteed, so that the test data error is detected. Thus, it becomes possible to regard the extracted error of the clock 200 as the error detection of the test data.
Also, in the present invention of claim 4 according to the present invention of claim 2, a plurality of test data may compose a frame including a frame synchronous pattern, the device may further comprise a frame synchronization detector which detects the frame synchronous pattern in synchronization with the clock, the test determining portion may determine the homo-code continuity proof test based on the detection result of the frame synchronous pattern.
Namely, the down data are composed of a frame including a frame synchronous pattern, so that a frame synchronous detector detects the frame synchronous pattern in synchronization with the extracted clock 200. In the same way as the data synchronous pattern of claim 1, the test determining portion can determine the result of the homo-code continuity proof test depending on the detection/undetection of the frame synchronous pattern.
Also, as for the present invention according to claim 5, a homo-code continuity proof testing device may comprise a scrambler which scrambles transmitting data, a synchronous pattern inserter which inserts a data synchronous pattern into the transmitting data, a test pattern inserter which inserts a predetermined test pattern for testing a homo-code continuity proof strength into the transmitting data, and a synchronizing portion which synchronizes the transmission data, with a predetermined clock, to be transmitted, so that the scrambler may not scramble the test pattern.
Namely, when the test data are usual, the scrambler scrambles the data to be transmitted, while when the test data include the test pattern, the scrambler transmits the data without scrambling.
Thus, the test pattern inserter 18 is not required to consider the scrambling characteristic of the scrambler, and has only to insert the predetermined test pattern without any change into the test data, resulting in a simple circuit arrangement.
Also, in the present invention of claim 6 according to the present invention of claim 2, the device may further include a descrambler which descrambles the test data but may not descramble the test pattern upon testing.
Namely, the descrambler does not descramble the test data when it is indicated that the test is being performed.
Thus, the test data including the test pattern, not scrambled, sent from the testing device 10 on the transmitting side can be received.
Also, in the present invention of claim 7 according to the present invention of claim 2, the data synchronous pattern may comprise an HEC of at least one of a data cell and a PLOAM cell.
Also, in the present invention of claim 8 according to the present invention of claim 2, the data synchronous pattern may comprise a PLOAM header of a PLOAM cell.
Also, in the present invention of claim 9 according to the present invention of claim 1, the error detecting pattern may comprise a BIP.
Also, in the present invention of claim 10 according to the present invention of claim 3, the error detecting pattern may comprise a BIP.
Also, in the present invention of claim 11 according to the present invention of claim 4, the frame synchronous pattern may comprise an IDENT of a PLOAM cell.
Also, in the present invention of claim 12 according to the present invention of claim 4, the frame synchronous pattern may comprise an IDENT of a PLOAM cell.
Also, in the present invention of claim 13 according to the present invention of claim 1, the test pattern may be inserted into a grant field of a PLOAM cell.
Also, in the present invention of claim 14 according to the present invention of claim 2, the test pattern may be inserted into a grant field of a PLOAM cell.
Also, in the present invention of claim 15 according to the present invention of claim 1, the error detecting pattern may comprise a CRC of a grant.
Also, in the present invention of claim 16 according to the present invention of claim 3, the error detecting pattern may comprise a CRC of a grant.
Also, in the present invention of claim 17 according to the present invention of claim 1, the test pattern may be inserted into a message field of a PLOAM cell.
Also, in the present invention of claim 18 according to the present invention of claim 2, the test pattern may be inserted into a message field of a PLOAM cell.
Also, in the present invention of claim 19 according to the present invention of claim 1, the error detecting pattern may comprise a CRC of a message.
Also, in the present invention of claim 20 according to the present invention of claim 3, the error detecting pattern may comprise a CRC of a message field.
Also, in the present invention of claim 21 according to the present invention of claim 2, the test pattern may be conformed to the ITU-T recommendation G.983.
Also, in the present invention of claim 22 according to the present invention of claim 17 or 18, a vendor message may be inserted into the message field.